The escalating complexity of systems has necessitated the development of more advanced design tools, methodologies, and languages to meet stringent time-to-market and cost constraints. Platform-centric and platform-based system-on-chip (SoC) design approaches, which emphasize software and hardware reuse, have gained significant traction within the Electronic System-Level (ESL) design community. Embedded systems, designed for dedicated applications in control systems, boast a unique ability to perform timely and predictable operations in response to concurrent external requests. To create efficient embedded systems, a meticulous application of suitable system architecture, hardware/software interfaces, peripheral devices, and software components is crucial.
Traditionally, embedded application developers would start with writing assembly language programs to manage peripherals, handle interrupts, and conduct I/O operations. However, this approach has fallen behind the rapid advancements in industry technology. The emergence of rapid prototyping and the development of microelectronic systems, including SoC-based platforms for embedded applications, abundant I/O interfaces catering to various needs, and high-level programming languages for software portability and modularity, have revolutionized the field. Effectively employing these modern tools and methodologies often results in reusable embedded software, enhancing overall system efficiency.
Recent advancements in Mega-gate FPGAs have facilitated the implementation of complete embedded systems on a single reconfigurable logic chip, including the incorporation of softcore or hardcore processors known as reconfigurable system-on-chip (rSoC). Softcore processors, while not as area and power efficient as fixed microprocessors on custom integrated circuits, offer the advantage of adaptability on an application-specific basis. This allows customization of the processor to meet the specific requirements of each application. For instance, softcore processors can be tailored to support fast floating-point operations if necessary, but exclude such functionality if not needed, resulting in optimal resource utilization.
Processors can further be customized by word size, cache size, and supported arithmetic operations, while the entire system can be tailored by including only the necessary peripherals for the targeted application. Despite these advancements, one area that remains relatively unexplored is the customization of the instruction set of the processor. Typically, the softcore CPU core is hand-optimized for its given instruction set to achieve reasonable clock speeds. However, users of softcore processors like Xilinx's Microblaze and Altera's Nios do not have direct access to the CPU's source code, limiting their ability to modify the instruction set. Additionally, changes to the instruction set require corresponding changes to the compiler, which poses challenges in automated customization. Nonetheless, exploring and optimizing the instruction set could lead to improved CPU performance and code size reduction, encompassing aspects like instruction format, addressing modes, and conditional execution.
This course provides an introductory exploration into the analysis and design of digital systems and microprocessors. It commences with digital logic gates and progresses towards designing combinational and sequential circuits. The curriculum covers analysis and design of synchronous finite state machines and register transfer level systems. Utilizing various modern software packages, students gain hands-on experience in computer-aided design and programming of digital electronic circuits. Moreover, the course offers a detailed introduction to the Verilog hardware description language, focusing on the implementation of complex digital systems in FPGA programmable logic devices. Topics covered include microprocessor systems, their architecture and instruction sets, hardware aspects of instruction execution, C/C++ programming languages, input/output, bus interfacing, and interrupts. Through a comprehensive co-design approach, students learn to integrate digital hardware and microprocessor systems effectively, bridging the gap between theory and practical applications.
Traditionally, embedded application developers would start with writing assembly language programs to manage peripherals, handle interrupts, and conduct I/O operations. However, this approach has fallen behind the rapid advancements in industry technology. The emergence of rapid prototyping and the development of microelectronic systems, including SoC-based platforms for embedded applications, abundant I/O interfaces catering to various needs, and high-level programming languages for software portability and modularity, have revolutionized the field. Effectively employing these modern tools and methodologies often results in reusable embedded software, enhancing overall system efficiency.
Recent advancements in Mega-gate FPGAs have facilitated the implementation of complete embedded systems on a single reconfigurable logic chip, including the incorporation of softcore or hardcore processors known as reconfigurable system-on-chip (rSoC). Softcore processors, while not as area and power efficient as fixed microprocessors on custom integrated circuits, offer the advantage of adaptability on an application-specific basis. This allows customization of the processor to meet the specific requirements of each application. For instance, softcore processors can be tailored to support fast floating-point operations if necessary, but exclude such functionality if not needed, resulting in optimal resource utilization.
Processors can further be customized by word size, cache size, and supported arithmetic operations, while the entire system can be tailored by including only the necessary peripherals for the targeted application. Despite these advancements, one area that remains relatively unexplored is the customization of the instruction set of the processor. Typically, the softcore CPU core is hand-optimized for its given instruction set to achieve reasonable clock speeds. However, users of softcore processors like Xilinx's Microblaze and Altera's Nios do not have direct access to the CPU's source code, limiting their ability to modify the instruction set. Additionally, changes to the instruction set require corresponding changes to the compiler, which poses challenges in automated customization. Nonetheless, exploring and optimizing the instruction set could lead to improved CPU performance and code size reduction, encompassing aspects like instruction format, addressing modes, and conditional execution.
This course provides an introductory exploration into the analysis and design of digital systems and microprocessors. It commences with digital logic gates and progresses towards designing combinational and sequential circuits. The curriculum covers analysis and design of synchronous finite state machines and register transfer level systems. Utilizing various modern software packages, students gain hands-on experience in computer-aided design and programming of digital electronic circuits. Moreover, the course offers a detailed introduction to the Verilog hardware description language, focusing on the implementation of complex digital systems in FPGA programmable logic devices. Topics covered include microprocessor systems, their architecture and instruction sets, hardware aspects of instruction execution, C/C++ programming languages, input/output, bus interfacing, and interrupts. Through a comprehensive co-design approach, students learn to integrate digital hardware and microprocessor systems effectively, bridging the gap between theory and practical applications.
UCERD Gathering Intellectuals Fostering Innovations
Unal Center of Educaiton Research & Development
Unal Center of Educaiton Research & Development
1. Introduction to processor technology and their architecture.
2. Introduction to combinational and sequential logic hardware using Verilog HDL.
3. Analyze and design complex digital systems through the Finite State Machine and Register-Transfer-Level frameworks.
4. Demonstrate a solid understanding of basic C programming languages in an embedded programming context.
5. Describe the architecture, programming and use of microprocessors and FPGAs, and distinguish appropriate areas of application for each technology.
6. Adopt a top-down design approach to reconstruct a design goal and translate system requirements into a practical design.
7. Plan, execute and report on a project working in a group.
8. Use a number of commercial and open-source softwares: Verilog, Modelsim, GNU GCC.
2. Introduction to combinational and sequential logic hardware using Verilog HDL.
3. Analyze and design complex digital systems through the Finite State Machine and Register-Transfer-Level frameworks.
4. Demonstrate a solid understanding of basic C programming languages in an embedded programming context.
5. Describe the architecture, programming and use of microprocessors and FPGAs, and distinguish appropriate areas of application for each technology.
6. Adopt a top-down design approach to reconstruct a design goal and translate system requirements into a practical design.
7. Plan, execute and report on a project working in a group.
8. Use a number of commercial and open-source softwares: Verilog, Modelsim, GNU GCC.
A Practical Approach to VLSI System on Chip (SoC) Design: A Comprehensive Guide
Introduction to Open Core Protocol: Fastpath to System-on-Chip Design
Multi-processor system-on-chip 2: Applications
System-on-Chip Security: Validation and Verification
Modern System-on-Chip Design on Arm
ARM Assembly Language: Programming and Architecture
ARM system-on-chip architecture
ARM ISA
UCERD Rawalpindi
Supercomputing Center
UCERD Murree