Provide development information

PMSS: A programmable memory system and scheduler for complex memory patterns

Authors: Tassadaq Hussain, Amna Haider and Eduard Ayguade
Publication date: 2014
Journal: Journal of Parallel and Distributed Computing


Abstract HPC industry demands more computing units on FPGAs, to enhance the
performance by using task/data parallelism. FPGAs can provide its ultimate performance on
certain kernels by customizing the hardware for the applications. However, applications are
getting more complex, with multiple kernels and complex data arrangements, generating
overhead while scheduling/managing system resources. Due to this reason all classes of
multi threaded machines–minicomputer to supercomputer–require to have efficient

— Viewd 294 TIme

Leave a Reply

Your email address will not be published. Required fields are marked *

five − 5 =

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>